1. Field of the Invention
The present invention relates to a display apparatus and a method for driving the same, and can be applied to an active matrix display apparatus including organic electroluminescence (EL) elements using, for example, a polysilicon thin-film transistor (TFT). In an embodiment of the present invention, by separately generating a write signal in a threshold-voltage correcting period and a write signal in a mobility correcting period, and selectively outputting the write signals, excessive or insufficient mobility correction based on emission brightness, coupling noise, and variations in mobility correcting periods between scanning lines are prevented, and image quality deterioration due to variations in the characteristics of transistors included in pixel circuits can be effectively avoided.
2. Description of the Related Art
Hitherto, regarding display apparatuses using organic EL elements, various techniques have been proposed in, for example, U.S. Pat. No. 5,684,365, and Japanese Unexamined Patent Application Publication No. 8-234683.
In a display apparatus 1 of the above type, each pixel includes an organic EL element that is a current-driven light-emitting element and a pixel circuit for driving the organic EL element. As shown in FIG. 3, by arranging the pixels in a matrix, a pixel section 2 is formed. In the pixel section 2, scanning lines SCN are horizontally provided in units of lines for the pixels arranged in a matrix. In addition, signal lines SIG are provided in units of columns so as to be perpendicular to the scanning lines SCN.
A selector 4 sequentially transfers predetermined sampling pulses and uses the sampling pulses to sequentially latch image data D1, whereby the image data D1 is distributed to each signal line SIG. The selector 4 performs analog-to-digital conversion on the image data D1 distributed to the signal line SIG. This generates a driving signal that time-divisionally represents an emission brightness of each pixel. The selector 4 outputs the driving signal to a corresponding signal line SIG.
In response to driving of the signal line SIG by the selector 4, vertical scanners 3A and 3B generate driving signals for each pixel and output the driving signals to the scanning lines SCN. This allows the display apparatus 1 to use the vertical scanners 3A and 3B to sequentially drive the individual pixels arranged in the pixel section 2. Each pixel is allowed to emit light at a signal level of each signal line SIG which is set by the selector 4, whereby a desired image is displayed in the pixel section 2.
In the display apparatus 1 of the above type, by using polysilicon TFTs, the pixel section 2, the vertical scanners 3A and 3B, the selector 4, etc., are collectively formed on a transparent insulated substrate such as a glass substrate or the like.
The polysilicon TFT is not free from variations in threshold voltage and mobility. A display apparatus using the organic EL elements has a problem in that image quality deteriorates due to the variations.
In a method for solving this problem, by using, for example, the circuit configuration shown in FIG. 4 to form a pixel circuit, a threshold voltage of a driving transistor and variations in mobility can be corrected.
In other words, in a display apparatus 11, a pixel section 12 is formed by arranging pixels 13 in a matrix. In each pixel 13, one end of a signal-level-holding capacitor C1 is connected to an anode of an organic EL element 14. The other end of the signal-level-holding capacitor C1 is connected to the signal line SIG through a write transistor TR1 that is turned on and off in accordance with a write signal WS. Accordingly, in the pixel 13, in accordance with the write signal WS, a voltage at the other end of the signal-level-holding capacitor C1 is set as a signal level of the signal line SIG.
In the pixel 13, the ends of the signal-level-holding capacitor C1 are connected to the source and gate of a driving transistor TR2. The drain of the driving transistor TR2 is connected to one scanning line SCN for supplying power. This causes the pixel 13 to drive the organic EL element 14 by using the driving transistor TR2, which has a source-follower-circuit configuration having a gate voltage set to a signal level of the signal line SIG. Here, Vcat represents a cathode potential of the organic EL element 14, and a capacitance Ce1 is a capacitance of the organic EL element 14.
In the display apparatus 11, a first vertical scanner (WSCN) 16A outputs the write signal WS to one scanning line SCN, and a second vertical scanner (DSCN) 16B outputs a power-supply driving signal Vccp to one scanning line SCN. In addition, a selector (HSEL) 15A of a horizontal driving circuit 15 outputs a driving signal Ssig to the signal line SIG. This controls an operation of the pixel 13.
FIG. 5 is a time chart showing the operation of the pixel 13. In the pixel 13, during a light-emission period that is a period in which the organic EL element 14 is allowed to emit light, the write signal WS sets the write transistor TR1 to be in an off-state, and, on the basis of a driving signal Vccp, a power-supply voltage Vcc is supplied to the driving transistor TR2 (parts (A) and (B) of FIG. 5). Accordingly, in the pixel 13, a gate voltage Vg and source voltage Vs (parts (D) and (E) of FIG. 5) of the driving transistor TR2 are held as voltages at the ends of the signal-level-holding capacitor C1. The organic EL element 14 is driven by a driving current Ids based on the gate voltage Vg and the source voltage Vs.
In the pixel 13, when the light-emission period ends, on the basis of the driving signal Vccp, the drain voltage of the driving transistor TR2 falls to a predetermined voltage Vss. This voltage Vss is set to a low voltage sufficient to stop light emission of the organic EL element 14. Accordingly, in the pixel 13, an end of the driving transistor TR2 on the side of the driving signal Vccp serves as a source, and an anode voltage of the organic EL element 14 falls, so that the organic EL element 14 stops light emission. At this time, stored charge is discharged from the signal-level-holding capacitor C1 on the side of the organic EL element 14. This causes the anode voltage of the organic EL element 14 to fall and the anode voltage is set as the voltage Vss. In association of the fall in anode voltage, the gate voltage Vg of the driving transistor TR2 falls.
Subsequently, in a state in which, on the basis of the driving signal Ssig, the voltage of the signal line SIG is allowed to fall to a predetermined voltage Vofs, the write signal switches on the write transistor TR1 (parts (A) and (C) of FIG. 5). Accordingly, in the pixel 13, the gate voltage Vg of the driving voltage TR2 is set as the voltage Vofs of the signal line SIG, and a gate-source voltage Vgs of the driving transistor TR2 is set as Vofs-Vss. Here, when a threshold voltage of the driving transistor TR2 is represented by Vth, the voltage Vofs is set so that the gate-source voltage Vgs of the driving transistor TR2 is greater than the threshold voltage Vth of the driving transistor TR2.
Subsequently, during a period denoted by the reference mark Tth1, in a state in which the write transistor TR1 is maintained to be on, the driving signal Vccp causes the drain voltage of the driving transistor TR2 to rise to the power-supply voltage Vcc. Accordingly, in the pixel 13, a charging current flows at an end of the signal-level-holding capacitor C1 on the side of the organic EL element 14 on the basis of the power-supply voltage Vcc via the driving transistor TR2, so that the voltage Vs gradually increases at the end on the side of the organic EL element 14.
Subsequently, in the pixel 13, the write signal WS turns off the write transistor TR1. This allows the charging current based on the power-supply voltage Vcc via the driving transistor TR2 to flow into the end of the signal-level-holding capacitor C1 on the side of the organic EL element 14, so that the source voltage Vs of the driving transistor TR2 continues to increase. Also, in this case, the gate voltage Vg of the driving transistor TR2 increases, following an increase in the source voltage Vs.
After a predetermined time elapses, as denoted by the reference mark Tth2, in the pixel 13, the signal level of the signal line SIG is switched to the voltage Vofs again. In a state in which a potential of the signal-level-holding capacitor C1 on the side of the signal line SIG is maintained to the voltage Vofs, a charging current flows at the end of the signal-level-holding capacitor C1 on the side of the organic EL element 14 on the basis of the power-supply voltage Vcc via the driving transistor TR2, so that the source voltage Vs of the driving transistor TR2 gradually increases. Accordingly, in the pixel 13, the source voltage Vs of the driving transistor TR2 gradually increases so that the gate-source voltage Vgs of the driving transistor TR2 approaches the threshold voltage Vth of the driving transistor TR2. When the gate-source voltage Vg of the driving transistor TR2 reaches the threshold voltage Vth of the driving transistor TR2, the flow of the charging current via the driving transistor TR2 stops.
The inflow of the charging current to the end of the signal-level-holding capacitor C1 on the side of the organic EL element 14 via the driving transistor TR2 is repeated a number of times which is sufficient for the gate-source voltage Vgs of the driving transistor TR2 to reach the threshold voltage Vth of the driving transistor TR2 (in the example shown in FIG. 5, twice as denoted by the reference marks Tth1 and Tth2). This sets the threshold voltage Vth of the driving transistor TR2 in the signal-level-holding capacitor C1. In the pixel 13, the voltages Vofs and Vcat are set so that Vel=Vofs−Vth≦Vcat+Vthel in a state in which the threshold voltage Vth of the driving transistor TR2 is set in the signal-level-holding capacitor C1. This sets the organic EL element 14 so as not to emit light. Here, Vthel represents a threshold voltage of the organic EL element 14.
After that, in the pixel 13, a potential of the signal-level-holding capacitor C1 on the side of the signal line SIG is set as a voltage Vsig representing an emission brightness of the organic EL element 14, whereby a grayscale voltage is set in the signal-level-holding capacitor C1 so that the threshold voltage Vth of the driving transistor TR2 is canceled. This prevents variations in emission brightness caused by variations in the threshold voltage Vth of the driving transistor TR2.
In other words, in the pixel 13, after elapse of the period Tth2, the signal level of the signal line SIG is set to the signal level Vsig representing the emission brightness of the pixel 13. Subsequently, during a period Tμ, the write signal WS sets the write transistor TR1 to be in an on-state. Accordingly, in the pixel 13, an end of the signal-level-holding capacitor C1 on the side of the signal line SIG is set to have a signal level Vsig. A current in accordance with the gate-source voltage Vgs by an interterminal voltage of the signal-level-holding capacitor C1 flows from a power supply having the voltage Vcc into an end of the organic EL element 14 on the side of the signal-level-holding capacitor C1 through the driving transistor TR2. This causes the source voltage Vs of the driving transistor TR2 to gradually increase.
The current that flows through the driving transistor TR2 changes in accordance with mobility of the driving transistor TR2, whereby, as the mobility of the driving transistor TR2 increases, a rise speed of the source voltage Vs increases. In addition, the current of the driving transistor TR2 that drives the organic EL element 14 in the case of causing the organic EL element 14 to emit light increases in accordance with the mobility. The driving transistor TR2 of this type is a polysilicon TFT or amorphous transistor, and has a defect in that mobility, represented by μ, greatly varies.
Accordingly, in the pixel 13, during the period Tμ, in a state in which the voltage of the signal-level-holding capacitor C1 on the side of the signal line SIG is held at the signal level Vsig, the driving transistor TR2 is turned on, whereby a charging current flows into the end of the signal-level-holding capacitor C1 on the side of the organic EL element 14. This decreases the interterminal voltage of the signal-level-holding capacitor C1 for the mobility of the driving transistor TR2, and prevents variations in emission brightness caused by variations in the mobility of the driving transistor TR2.
In the pixel 13, after the predetermined period Tμ elapses, the write signal WS turns off the write transistor TR1, so that the signal level Vsig of the signal line SIG is set in the signal-level-holding capacitor C1, thus initiating an emission period.
According to the construction shown in FIGS. 4 and 5, a simplified pixel circuit configuration can prevent deterioration in image quality caused by variations in the threshold voltage Vth and mobility in the driving transistor TR2 that drives the organic EL element 14.
However, the construction shown in FIGS. 4 and 5 causes new problems. The write signal WS that determines the period Tμ is generated for each scanning line SCN in the vertical scanner 16A by using predetermined reference pulses. The generated write signal WS is input to each pixel 13 through a buffer circuit or the like. Therefore, on the basis of variations in a threshold voltage, mobility, etc., of a transistor provided up to the pixel 13, as shown in FIG. 6, a phase, transient, etc., of the write signal WS vary. As a result, in the display apparatus 11, a problem occurs in that a brightness level difference is generated between lines since the period Tμ for correcting mobility varies between lines. The brightness level difference between lines is viewed as a stripe, for example, on a dark display screen.
In addition, when the signal level of the write signal WS rapidly falls from a high level to a low level, a problem occurs in that coupling noise caused by parasitic capacitance of the write transistor TR1 is displayed.
In the period Tμ for correcting mobility, the current Ids that flows in the driving transistor TR2 changes in accordance with the gate-source voltage of the driving transistor TR2, whereby, as the signal level Vsig of the signal line SIG is greater, that is, as the organic EL element 14 is allowed to emit light at a high brightness level, a large current flows, so that a voltage rise speed at the end of the signal-level-holding capacitor C1 on the side of the organic EL element 14 increases. Therefore, as the organic EL element 14 is allowed to emit light at a high brightness level, variations in mobility can be corrected in a short time. Conversely, when the signal Vsig of the signal line SIG is low, that is, when the organic EL element 14 is allowed to emit light at a low brightness level, the voltage rise speed at the end of the signal-level-holding capacitor C1 on the side of the organic EL element 14 decreases, and a time necessary for mobility correction increases.
Accordingly, in the construction in FIGS. 4 and 5, the mobility of the driving transistor TR2 is excessively corrected in accordance with the emission brightness of the organic EL element 14, or the correction is insufficient. Consequently, image quality deteriorates, and, in addition, a problem occurs in that a yield deteriorates.
As a method for solving the new problems, it is possible that a final stage of a vertical scanner for outputting the write signal WS be configured as shown in FIG. 7. Specifically, by connecting, in stages, pairs of P-channel transistors and N-channel transistors, a buffer circuit 21 in an output stage of the write signal WS is formed. As shown in FIG. 8, parts (A) to (C), a voltage of power Vws that is supplied to a pair of transistors TR3 and TR4 is allowed to fall temporarily on the side of a terminating end of the period Tμ for correcting mobility. The temporary voltage falling is gradually executed.
FIG. 9 is a block diagram showing a vertical scanner including the configuration of the buffer circuit 21. The vertical scanner 22 shown in FIG. 9 has a configuration for one scanning line SCN. The vertical scanner 22 uses a shift register (not shown) to sequentially transfer vertical start pulses synchronized with a vertical synchronizing signal, and generates, for each scanning line SCN, a reference signal IN that is used as a basis for timing of the write signal WS that is output to the scanning line SCN. The vertical scanner 22 inputs the reference signal IN to a shift register (SR) 23 and generates a delay signal that is delayed for predetermined clocks. The vertical scanner 22 inputs a timing-based driving signal or the signal IN, the delay signal, and various reference signals EN1 and DVth to a logical operation circuit 24. As shown in part (A) of FIG. 10, logical operation processing in the logical operation circuit 24 generates a first driving signal S1 whose logic level falls in the periods Tth1 and Tth2 correcting the threshold voltage Vth.
The vertical scanner 22 inputs an inversion signal of the driving signal IN, the delay signal, and a predetermined reference signal EN2 to a NAND circuit 26. The NAND circuit 26 generates an inversion signal of an AND signal of these signals, whereby, as shown in part (B) of FIG. 10, a second driving signal S2 whose logic level falls in the mobility correcting period Tμ is generated.
The vertical scanner 22 uses a NAND circuit 27 to generate an inversion signal of an AND signal of the first and second driving signals S1 and S2, and inputs the inversion signal to the buffer circuit 21 sequentially through a buffer circuit 28 and a level conversion circuit 29. The level conversion circuit 29 is provided to convert an amplitude of an output signal into an amplitude adapted for driving the organic EL element 14. Accordingly, as shown in part (C) of FIG. 10, the vertical scanner 22 generates a third driving signal S3 whose logic level rises in the mobility correcting period Tμ.
In the vertical scanner 22 shown in FIG. 9, regarding power Vws that is supplied to a pair of transistors in the final stage of the buffer circuit 21, a voltage is allowed to fall temporarily at a terminating end of the mobility correcting period Tμ. By gradually executing the temporary voltage falling, as shown in part (D) of FIG. 10, the write signal WS is allowed to rise in level in the periods Tth1 and Tth2 for correcting the threshold value Vth and the mobility correcting period Tμ. In addition, the signal level is allowed to gradually fall at the terminating end of the correcting period Tμ. Therefore, in the display apparatus 11, as the signal level Vsig of the signal line SIG increases, the write transistor TR1 can be turned off at an early time. Accordingly, correction of variations in the mobility can be finished and excessive or insufficient mobility correction based on the emission brightness can be prevented. In addition, since the signal level of the write signal WS is gradual, also coupling noise can be prevented. However, even in this method, it is difficult to completely prevent variations in the period Tμ for correcting mobility between lines.
As shown in parts (A1) to (C1) in FIG. 8 in comparison with (A) to (C) in FIG. 8, a method is possible in which, by supplying a power-supply voltage to the pair of transistors in the final stage of the buffer circuit 21 only during the periods Tth1 and Tth2 for correcting the threshold value Vth and the mobility correcting period Tμ, variations in the mobility correcting period Tμ are limited in a predetermined period on the basis of a change in power-supply voltage. In other words, in the case of this method, as shown in FIG. 11 in comparison with FIG. 7, by supplying power to the pair of transistors in the final stage via a low-pass filter including, for example, a resistor R and a capacitor C, rising and falling edges of the write signal WS in the mobility correcting period Tμ are made gradual, and the mobility correcting period Tμ can be set on the basis of a driving signal Vws that is input to the low-pass filter. Therefore, variations in the mobility correcting period between the scanning lines SCN can be reduced. In addition, excessive or insufficient mobility correction based on emission brightness can be prevented, and, in addition, coupling noise can be prevented.
However, this method has a problem in that, not only the mobility correcting period Tμ, but also the period Tth for correcting the threshold voltage Vth of the driving transistor TR1 has gradual rising and falling edges of a signal level. As described above, when even the period Tth for correcting the threshold voltage Vth has gradual rising and falling edges of a signal level, power consumption increases.